Thin-film photovoltaic (PV) devices based on CdS/CdTe technology represent one of the fastest-growing segments of all PV technologies. Most CdS/CdTe devices are configured in one or more variations of a superstrate design. In a typical superstrate design, light enters the device through a transparent glass “superstrate,” is transmitted through one or more transparent conducting oxide (TCO) layers, one or more buffer layers and through an n-type CdS and/or CdS-alloy window layer. The light is then absorbed in a CdTe absorber layer.
A superstrate configured CdS/CdTe device must also include an ohmic contact in electrical communication with the CdTe absorber layer opposite the CdS window. This contact is commonly referred to as the “back contact.” A back contact is necessary to establish a low-resistance pathway for electrons to enter the CdTe layer during device operation. It is now known however, that certain back contact formation process will also significantly alter the electrical properties of the underlying CdTe layer, thereby significantly affecting device functionality. In particular, an as-deposited CdTe layer is often of insufficient electrical quality for effective junction operation. Many factors affect the suitability of a CdTe layer, including the CdTe source material used, the specifics of the CdTe deposition steps and selected treatment processes. Often, the net acceptor density of the CdTe layer will be too low for optimal device operation. Also, the CdTe material may be n-type prohibiting device operation. Even if the acceptor density is sufficiently high in the CdTe as deposited, the minority-carrier lifetime is often too short for efficient operation.
The foregoing problems can be addressed by back contacting processes that diffuse one or more dopant species into the CdTe layer. Although Cu has been historically for the active diffusing dopant species, other group IB species (for example Au or Ag) or group VA species (for example, N, P, As, Sb, or Bi) have been found to demonstrate potential for this use. Although the precise defect formation that occurs during dopant diffusion remains debated, it is known that a successful diffusion alters the electrical properties of the underlying CdTe layer so that it becomes sufficiently p-type to establish a strong field in the device regions near the n-type CdS layer. Furthermore, Cu diffusion at an appropriate temperature has been found to increase carrier lifetime within the CdTe layer.
One back contact structure which has been shown to be particularly advantageous includes a ZnTe contact interface layer doped with copper, referred to herein as a ZnTe:Cu contact interface layer. After deposition, some or all of the ZnTe:Cu contact interface layer is then overlaid with a deposited metal contact. As noted above, Cu must diffuse from the contact interface layer into the CdTe layer to improve CdS/CdTe device functionality by causing the CdTe layer to become p-type and possibly by changing other electrical properties of the CdTe layer. Thus, any process that prevents or limits Cu diffusion can be detrimental to the process reproducibility and ultimate device efficiency. For example, oxidation of Cu to form CuO during or after deposition of the contact interface layer can limit diffusion of any Cu contained within an oxide.
The embodiments disclosed herein are intended to overcome one or more of the limitations described above. The foregoing examples of the related art and limitations related therewith are intended to be illustrative and not exclusive. Other limitations of the related art will become apparent to those of skill in the art upon a reading of the specification and a study of the drawings.